| Presentation | 2001/1/17 A Single-Rail Asynchronous Full Adder Yukiyasu Nakamura, Masahiro Sakamoto, Michitada Morisue, Hisato Fujisaka, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Novel SFQ logic circuits for a single-rail asynchronous adder are proposed. The principle of the circuit proposed here is based on a binary system, in which the logic of "1" is made to correspond to a positive pulse produced in the SFQ circuit while the logic of "0" is to a negative pulse. By using the binary values represented by positive and negative pulses, high performance logic circuits in asynchronous operation without a handshake process can be realized. In this paper, especially, the SFQ full-adder in an asynchronous operation is described in detail. In order to verify correct operations of the full-adder, computer simulations have been made. Simulation results show that the full-adder achieves reliable operations. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | asynchronous circuit / SFQ / Josephson Junction |
| Paper # | SCE2000-44 |
| Date of Issue |
| Conference Information | |
| Committee | SCE |
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| Conference Date | 2001/1/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Single-Rail Asynchronous Full Adder |
| Sub Title (in English) | |
| Keyword(1) | asynchronous circuit |
| Keyword(2) | SFQ |
| Keyword(3) | Josephson Junction |
| 1st Author's Name | Yukiyasu Nakamura |
| 1st Author's Affiliation | Graduate School of Information Sciences, Department of Information Machines and Interfaces, Hiroshima City University Graduate School() |
| 2nd Author's Name | Masahiro Sakamoto |
| 2nd Author's Affiliation | Graduate School of Information Sciences, Department of Information Machines and Interfaces, Hiroshima City University Graduate School |
| 3rd Author's Name | Michitada Morisue |
| 3rd Author's Affiliation | Graduate School of Information Sciences, Department of Information Machines and Interfaces, Hiroshima City University Graduate School |
| 4th Author's Name | Hisato Fujisaka |
| 4th Author's Affiliation | Graduate School of Information Sciences, Department of Information Machines and Interfaces, Hiroshima City University Graduate School |
| Date | 2001/1/17 |
| Paper # | SCE2000-44 |
| Volume (vol) | vol.100 |
| Number (no) | 572 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |