Presentation | 1994/12/14 A Josephson Binary-to-Ternary Converter Tsubasa Ogata, Michitada Morisue, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This paper presents a novel Josephson converter to perform signal conversion from binary logic system to ternary logic system. The circuit of the converter is composed of the Josephson Complementary Ternary Logic circuit(JCTL).Detailed descriptions of the circuit operation are presented.In order to investigate the operation of proposed converter,we have simulated the converter in which 8-bit binary number is converted to 6-trit ternary number. The simulation results showed very high speed operation,about 400ps.The advantages of this binary, ternary converter are:1)very simple construction,2)small number of elements and 3)very high speed operation. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Josephson circuit / Ternary logic circuit / binary/ernary converter / SQUID |
Paper # | SCE94-43,CPM94-98 |
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Conference Information | |
Committee | SCE |
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Conference Date | 1994/12/14(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Superconductive Electronics (SCE) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Josephson Binary-to-Ternary Converter |
Sub Title (in English) | |
Keyword(1) | Josephson circuit |
Keyword(2) | Ternary logic circuit |
Keyword(3) | binary/ernary converter |
Keyword(4) | SQUID |
1st Author's Name | Tsubasa Ogata |
1st Author's Affiliation | Faculty of Engineering,Saitama University() |
2nd Author's Name | Michitada Morisue |
2nd Author's Affiliation | Faculty of Engineering,Saitama University |
Date | 1994/12/14 |
Paper # | SCE94-43,CPM94-98 |
Volume (vol) | vol.94 |
Number (no) | 393 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |