| Presentation | 1998/11/16 Single-Flux-Quantum Logic Circuits Based on the Binary Decision Diagram : Circuit design for a 32-bit adder Noboru ASAHI, Takashi YAMADA, Masamichi AKAZAWA, Yoshihito AMEMIYA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 32-bit adder circuit is designed using single-flux-quantum (SFQ) circuits, on the basis of the binary decision diagram (BDD). The BDD is a graphical method for representing digital functions and can provide a concise expression for most logic functions encountered in LSI design applications. We here construct a high-speed SFQ adder circuit based on a BDD representation simplified by the method of isomorphic-subgraph substitution. To construct the adder circuit compactly, we propose the BDD device that can be driven by SFQ signal. It is shown by computer simulation that the operation speed of the designed 32-bit adder is 350ps. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Binary Decision Diagram / BDD / Single Flux Quantum / SFQ / Logic circuit / Adder circuit |
| Paper # | SCE98-32 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 1998/11/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Single-Flux-Quantum Logic Circuits Based on the Binary Decision Diagram : Circuit design for a 32-bit adder |
| Sub Title (in English) | |
| Keyword(1) | Binary Decision Diagram |
| Keyword(2) | BDD |
| Keyword(3) | Single Flux Quantum |
| Keyword(4) | SFQ |
| Keyword(5) | Logic circuit |
| Keyword(6) | Adder circuit |
| 1st Author's Name | Noboru ASAHI |
| 1st Author's Affiliation | Faculty of Engineering, Hokkaido University() |
| 2nd Author's Name | Takashi YAMADA |
| 2nd Author's Affiliation | Faculty of Engineering, Hokkaido University |
| 3rd Author's Name | Masamichi AKAZAWA |
| 3rd Author's Affiliation | Faculty of Engineering, Hokkaido University |
| 4th Author's Name | Yoshihito AMEMIYA |
| 4th Author's Affiliation | Faculty of Engineering, Hokkaido University |
| Date | 1998/11/16 |
| Paper # | SCE98-32 |
| Volume (vol) | vol.98 |
| Number (no) | 399 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |