| Presentation | 1999/1/27 Optimization of RSFQ Circuits by a Monte Calro Method K. Yoneyama, Y. Kato, N. Yoshikawa, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In order to make large-scale RSFQ integrated circuits, it is neccessary to make a circuit operational margin as large as possible. However, it is difficult to find out suitable parameter sets of complex RSFQ circuits because RSFQ circuits include non-linear circuit elements. Until now, the circuit optimization method finding the edge of operational margin of circuit parameters is generally used. In this report we investigate a circuit optimizing method in which the circuit yields calcurated by Calro Monte method are used as a index number for optimization. In order to find better circuit yield, we use center of grabity method(C.G.M), where the next suitable parameter vector is calcurated from the gravity center of parameter vectors within the operational region. Investigation of convergency and initial condition dependence of optimized circuit parameter indicated that Monte Calro optimization method is efficient for the improvement of circuit yield. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | RSFQ circuit / C.G.M / Monte Calro method / circuit yield / optimization / Superconduction integrated circuit |
| Paper # | SCE98-39 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 1999/1/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Optimization of RSFQ Circuits by a Monte Calro Method |
| Sub Title (in English) | |
| Keyword(1) | RSFQ circuit |
| Keyword(2) | C.G.M |
| Keyword(3) | Monte Calro method |
| Keyword(4) | circuit yield |
| Keyword(5) | optimization |
| Keyword(6) | Superconduction integrated circuit |
| 1st Author's Name | K. Yoneyama |
| 1st Author's Affiliation | Faculty of Engineering, Yokohama National University() |
| 2nd Author's Name | Y. Kato |
| 2nd Author's Affiliation | Faculty of Engineering, Yokohama National University |
| 3rd Author's Name | N. Yoshikawa |
| 3rd Author's Affiliation | Faculty of Engineering, Yokohama National University |
| Date | 1999/1/27 |
| Paper # | SCE98-39 |
| Volume (vol) | vol.98 |
| Number (no) | 564 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |