Presentation | 1993/10/20 Layout design of a high-speed Josephson LSI chip using an automatic placement and routing thechnique Masahiro Aoyagi, Yoichi Hamazaki, Hiroshi Nakagawa, Itaru Kurosawa, Susumu Takada, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A layout design technique for a high-speed Josephson LSI using an automatic placement and routing technique with standard cells has been developed.Related with a power wiring on a high-speed Josephson LSI chip,dividing method of a circuit and balancing method of power loads are proposed.As an example,layout design of a LSI chip with 1500 gates for testing a high speed operation with 1 GHz is described. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Josephson junction / Logic circuit / Integrated circuit / Automatic placementand routing |
Paper # | SCE93-35 |
Date of Issue |
Conference Information | |
Committee | SCE |
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Conference Date | 1993/10/20(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
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Assistant |
Paper Information | |
Registration To | Superconductive Electronics (SCE) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Layout design of a high-speed Josephson LSI chip using an automatic placement and routing thechnique |
Sub Title (in English) | |
Keyword(1) | Josephson junction |
Keyword(2) | Logic circuit |
Keyword(3) | Integrated circuit |
Keyword(4) | Automatic placementand routing |
1st Author's Name | Masahiro Aoyagi |
1st Author's Affiliation | Electrotechnical Laboratory() |
2nd Author's Name | Yoichi Hamazaki |
2nd Author's Affiliation | Electrotechnical Laboratory |
3rd Author's Name | Hiroshi Nakagawa |
3rd Author's Affiliation | Electrotechnical Laboratory |
4th Author's Name | Itaru Kurosawa |
4th Author's Affiliation | Electrotechnical Laboratory |
5th Author's Name | Susumu Takada |
5th Author's Affiliation | Electrotechnical Laboratory |
Date | 1993/10/20 |
Paper # | SCE93-35 |
Volume (vol) | vol.93 |
Number (no) | 279 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |