| Presentation | 1997/1/22 A Miniaturized Josephson Memory Cell Fabricated using ECR Plasma Etching and Bias-Sputtering Planarization Hideaki Numata, Shuichi Nagasawa, Shuichi Tahara, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We developed an 8.5μm×11.5μm vortex transitional (VT) memory cell. The memory cell is the smallest Josephson memory cell ever reported. The cell was fabricated by electron cyclotron resonance plasma etching and bias-sputtering planarization. This is also the first Josephson circuit fabricated with sub-micron minimum feature size. Proper non-destructive read-out operation was verified even after half-selected conditions. An operating margin of ±14% was obtained for control currents I_X and I_Y. These results are promising for developing a high density Josephson RAM. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Josephson Device / Memory / Superconductive Circuit / ECR Plasma Etching / Bias-Sputtering / Planarization |
| Paper # | SCE96-29 |
| Date of Issue |
| Conference Information | |
| Committee | SCE |
|---|---|
| Conference Date | 1997/1/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Miniaturized Josephson Memory Cell Fabricated using ECR Plasma Etching and Bias-Sputtering Planarization |
| Sub Title (in English) | |
| Keyword(1) | Josephson Device |
| Keyword(2) | Memory |
| Keyword(3) | Superconductive Circuit |
| Keyword(4) | ECR Plasma Etching |
| Keyword(5) | Bias-Sputtering |
| Keyword(6) | Planarization |
| 1st Author's Name | Hideaki Numata |
| 1st Author's Affiliation | Fundamental Research Laboratories, NEC Corporation() |
| 2nd Author's Name | Shuichi Nagasawa |
| 2nd Author's Affiliation | Fundamental Research Laboratories, NEC Corporation |
| 3rd Author's Name | Shuichi Tahara |
| 3rd Author's Affiliation | Fundamental Research Laboratories, NEC Corporation |
| Date | 1997/1/22 |
| Paper # | SCE96-29 |
| Volume (vol) | vol.96 |
| Number (no) | 452 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |