| Presentation | 1996/10/30 High Frequency Clock Operation of Josephson Memories Shuichi Nagasawa, Hideaki Numata, Yoshihito Hashimoto, Shuichi Tahara, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have designed a Josephson 256word×16bit RAM to realize a high frequency clock operation of Josephson memories. It consists of 4×4 matrix array of 256RAM blocks, impedance matching lines, and input signal amplifiers. A transformer and a regulator are included in each 256RAM block. We have measured fail bit maps for the 256RAM blocks, and obtained perfect operation of 100% bit yield. The 256RAM block properly functioned at high frequency clock of 512MHz. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Josephson Memory / Superconductive Integrated Circuit / high Frequency Operation / Transformer / Impedance Matching |
| Paper # | SCE96-20 |
| Date of Issue |
| Conference Information | |
| Committee | SCE |
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| Conference Date | 1996/10/30(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High Frequency Clock Operation of Josephson Memories |
| Sub Title (in English) | |
| Keyword(1) | Josephson Memory |
| Keyword(2) | Superconductive Integrated Circuit |
| Keyword(3) | high Frequency Operation |
| Keyword(4) | Transformer |
| Keyword(5) | Impedance Matching |
| 1st Author's Name | Shuichi Nagasawa |
| 1st Author's Affiliation | Fundamental Research Labs., NEC Corporation() |
| 2nd Author's Name | Hideaki Numata |
| 2nd Author's Affiliation | Fundamental Research Labs., NEC Corporation |
| 3rd Author's Name | Yoshihito Hashimoto |
| 3rd Author's Affiliation | Fundamental Research Labs., NEC Corporation |
| 4th Author's Name | Shuichi Tahara |
| 4th Author's Affiliation | Fundamental Research Labs., NEC Corporation |
| Date | 1996/10/30 |
| Paper # | SCE96-20 |
| Volume (vol) | vol.96 |
| Number (no) | 333 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |