Presentation 1998/1/28
A Josephson ternary memory circuit
J. Endou, T. Morooka, N. Shimizu, M. Morisue,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A novel ternary logic memory circuit using Josephson junctions is described. The principle of the ternary memory cicuit proposed here is based on the persistent circulating currents in the superconducting loop in the clockwise and the counter clockwise directions. The three-junction SQUID and the JCTL which is constructed by combination of two two-junction SQUIDs are used, as the gates for writing and reading operation of the memory. In order to develop the memory circuit, we have made the simulations to determine the most suitable circuit parameters to the memory cell and then fabricated the circuit in 2μm minimum line width technoloby. The simulation results show satisfactory operations of the memory circuit, which agree well with the experiment results.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Superconducting / SQUID / Nb/AlO_x/Al/Nb Junction / Memory circuit
Paper # SCE97-37
Date of Issue

Conference Information
Committee SCE
Conference Date 1998/1/28(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
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Paper Information
Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Josephson ternary memory circuit
Sub Title (in English)
Keyword(1) Superconducting
Keyword(2) SQUID
Keyword(3) Nb/AlO_x/Al/Nb Junction
Keyword(4) Memory circuit
1st Author's Name J. Endou
1st Author's Affiliation Tokyo Electric Power Co()
2nd Author's Name T. Morooka
2nd Author's Affiliation Seiko Instuments Inc.
3rd Author's Name N. Shimizu
3rd Author's Affiliation Seiko Instuments Inc.
4th Author's Name M. Morisue
4th Author's Affiliation Hiroshima City University
Date 1998/1/28
Paper # SCE97-37
Volume (vol) vol.97
Number (no) 516
Page pp.pp.-
#Pages 5
Date of Issue