Presentation 1997/11/20
Circuit operation of a ring interface switch for superconducting ring network
Shinichi YOROZU, Yoshihito HASHIMOTO, Hideaki NUMATA, Michi TANAKA, Shuichi TAHARA,
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Abstract(in English) We report on the experimental full operation of a processor interface node circuit (an RIF circuit), which is the most important component of our proposed superconducting ring network. This circuit was designed for the prototype three-node ring network system. At over 1 GHz, we successfully operated the packet-validity-checking and validity-setting parts, which include the critical path of the RIF circuit. Our results strongly suggest that GHz-level operation of the RIF circuit.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Superconducting device / superconducting circuit / network switch / pipeline ring
Paper # SCE97-27
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Conference Information
Committee SCE
Conference Date 1997/11/20(1days)
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Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Circuit operation of a ring interface switch for superconducting ring network
Sub Title (in English)
Keyword(1) Superconducting device
Keyword(2) superconducting circuit
Keyword(3) network switch
Keyword(4) pipeline ring
1st Author's Name Shinichi YOROZU
1st Author's Affiliation Fundamental Research Laboratories, NEC Corporation()
2nd Author's Name Yoshihito HASHIMOTO
2nd Author's Affiliation Fundamental Research Laboratories, NEC Corporation
3rd Author's Name Hideaki NUMATA
3rd Author's Affiliation Fundamental Research Laboratories, NEC Corporation
4th Author's Name Michi TANAKA
4th Author's Affiliation Fundamental Research Laboratories, NEC Corporation
5th Author's Name Shuichi TAHARA
5th Author's Affiliation Fundamental Research Laboratories, NEC Corporation
Date 1997/11/20
Paper # SCE97-27
Volume (vol) vol.97
Number (no) 383
Page pp.pp.-
#Pages 6
Date of Issue