Presentation	1996/11/2 Design of a 32 PEs Architecture for SOM ANN O. Hammami, D. Suzuki,
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Abstract(in Japanese)	(See Japanese page)
Abstract(in English)	The Self Organizing Map (SOM) algorithm is a method to transfer information defined in a high dimensionnal space to another low dimensionnal space preserving the topological features. We propose a 32 PE SIMD hardware architecture for SOM. The number of bits per weight is 8 and the number of bits per input is 8. There are 3 inputs X, Y, Z which represent coordinates in a 3D space. A pipelined SIMD version of the architecture is analyzed and some architectural proposals are made. The design was realized using Cadence EDA tools and StateCAD for the machine designs. The whole design was simulated with Verilog-XL simulator using Verilog-HDL.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	ANN / pipeline / SIMD / SOM
Paper #	AI96-26
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Conference Information
Committee	AI
Conference Date	1996/11/2(1days)
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Paper Information
Registration To	Artificial Intelligence and Knowledge-Based Processing (AI)
Language	ENG
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Design of a 32 PEs Architecture for SOM ANN
Sub Title (in English)
Keyword(1)	ANN
Keyword(2)	pipeline
Keyword(3)	SIMD
Keyword(4)	SOM
1st Author's Name	O. Hammami
1st Author's Affiliation	Computer Achitecture Lab. Hardware Department University of Aizu Fukushima()
2nd Author's Name	D. Suzuki
2nd Author's Affiliation	Computer Achitecture Lab. Hardware Department University of Aizu Fukushima
Date	1996/11/2
Paper #	AI96-26
Volume (vol)	vol.96
Number (no)	346
Page	pp.pp.-
#Pages	7
Date of Issue