Presentation 1997/3/19
High Speed Processing of Polynocular Stereo Algorithm Using DSP
Takashi NOGUCHI, Yuichi OHTA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper describes an implementation of our polynocular stereo algorithm on a DSP based general purpose image processor.The image processor has reconfigurable multiple DSP modules which are connected in a parallel pipeline structure.Each submodules in the stereo algorithm are mapped on a DSP.An occlusion disposable pentanocular stereo algorithm has been successfully developed on the image processor.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) polynocular stereo / DSP / occlusion disposition / disparity map
Paper # PRMU96-198
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Conference Information
Committee PRMU
Conference Date 1997/3/19(1days)
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Paper Information
Registration To Pattern Recognition and Media Understanding (PRMU)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) High Speed Processing of Polynocular Stereo Algorithm Using DSP
Sub Title (in English)
Keyword(1) polynocular stereo
Keyword(2) DSP
Keyword(3) occlusion disposition
Keyword(4) disparity map
1st Author's Name Takashi NOGUCHI
1st Author's Affiliation Institute of Information Sciences and Electronics University of Tsukuba()
2nd Author's Name Yuichi OHTA
2nd Author's Affiliation Institute of Information Sciences and Electronics University of Tsukuba
Date 1997/3/19
Paper # PRMU96-198
Volume (vol) vol.96
Number (no) 599
Page pp.pp.-
#Pages 8
Date of Issue