| Presentation | 1999/5/24 On Improvement of Vehicular Speed Response Phase Locked Loop (VSR-PLL) Performance Go Kitabata, Masanori Hamamura, Shin'ichi Tachikawa, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes a vehicular speed response phase locked loop (VSR-PLL) using a square-law or 4th power circuit instead of using a pilot signal, and presents a comparison between the performances of the proposed and the conventional VSR-PLLs. First, on the assumption of perfect separation between the data signal and the pilot signal of the conventional VSR-PLL, BER performances are shown by a theoretical analysis and computer simulations. Second, in the case when the data signal and pilot signal interfere with each other, a degradation of BER performance for the conventional VSR-PLL is shown, and the reasons for this degradation are discussed. Next, the proposed VSR-PLL models using the square-law and the 4th power circuits for BPSK and QPSK signals are described and its BER performances are shown by computer simulations. Finally, it is shown that BER of the proposed system is superior to that of the conventional system under the same condition. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | VSR-PLL / BPSK / QPSK / square-raw circuit / fourth power circuit |
| Paper # | RCS99-21 |
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| Conference Information | |
| Committee | RCS |
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| Conference Date | 1999/5/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Radio Communication Systems (RCS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | On Improvement of Vehicular Speed Response Phase Locked Loop (VSR-PLL) Performance |
| Sub Title (in English) | |
| Keyword(1) | VSR-PLL |
| Keyword(2) | BPSK |
| Keyword(3) | QPSK |
| Keyword(4) | square-raw circuit |
| Keyword(5) | fourth power circuit |
| 1st Author's Name | Go Kitabata |
| 1st Author's Affiliation | Nagaoka University of Technology() |
| 2nd Author's Name | Masanori Hamamura |
| 2nd Author's Affiliation | Nagaoka University of Technology:Research Fellow of the Japan Society for the Promotion of Science |
| 3rd Author's Name | Shin'ichi Tachikawa |
| 3rd Author's Affiliation | Nagaoka University of Technology |
| Date | 1999/5/24 |
| Paper # | RCS99-21 |
| Volume (vol) | vol.99 |
| Number (no) | 85 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |