Presentation 1993/9/30
Alternate open-loop operation frequency synthesizer
Masato Mizoguchi, Kazuhiko Seki, Shuzo Kato,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper proposes a novel configuration of a low power consumption,fast settling frequency synthesizer.The synthesizer employs two sets of a sample-hold VCO and a carrier switch which selects VCO output as the output of the synthesizer burst-by-burst. The power consumption is less than 70% of that of the conventional synthesizer with dual PLL circuits.The frequency error caused by sample-hold operation is analyzed theoretically and experimentally. The results confirm that the theoretical analyses give a good approximation and show that the longer acquisition time of the sample-hold circuit minimizes the frequency error at the synthesizer output.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) frequency synthesizer / TDMA-TDD system / low power consumption / Sample hold circuit / VCO open-loop operation
Paper # RCS93-60
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Conference Information
Committee RCS
Conference Date 1993/9/30(1days)
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Registration To Radio Communication Systems (RCS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Alternate open-loop operation frequency synthesizer
Sub Title (in English)
Keyword(1) frequency synthesizer
Keyword(2) TDMA-TDD system
Keyword(3) low power consumption
Keyword(4) Sample hold circuit
Keyword(5) VCO open-loop operation
1st Author's Name Masato Mizoguchi
1st Author's Affiliation NTT()
2nd Author's Name Kazuhiko Seki
2nd Author's Affiliation NTT
3rd Author's Name Shuzo Kato
3rd Author's Affiliation NTT
Date 1993/9/30
Paper # RCS93-60
Volume (vol) vol.93
Number (no) 255
Page pp.pp.-
#Pages 7
Date of Issue