| Presentation | 1996/1/25 High Speed Switching Fractional-N Synthesizer using Phase Error Compensation Scheme with Controlling Pulse Width Kenro HIRATA, Hisao TACHIKA, Tadashi FUJINO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes applying the fractional-N scheme to a high speed switching synthesizer in Japanese digital cellular telecommunication systems, i. e., PDC(Personal Digital Cellular). A fractional-N synthesizer can use higher reference frequency than that of a conventional PLL (Phase-Locked Loop) synthesizer. Consequently, a fractional-N synthesizer can realize high speed switching. Added to this, a fractional-N synthesizer is expected to be small size and low power consumption. However, a fractional-N synthesizer has the spurious caused by the phase error. This paper describes the phase error compensation scheme with controlling pulse width, then shows experimental results. It is confirmed by experimental results that the performance of this scheme is good enough for the high speed switching synthesizer of PDC. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | high speed switching / fractional-N / phase error compensation / frequency synthesizer |
| Paper # | RCS95-119 |
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| Conference Information | |
| Committee | RCS |
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| Conference Date | 1996/1/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Radio Communication Systems (RCS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High Speed Switching Fractional-N Synthesizer using Phase Error Compensation Scheme with Controlling Pulse Width |
| Sub Title (in English) | |
| Keyword(1) | high speed switching |
| Keyword(2) | fractional-N |
| Keyword(3) | phase error compensation |
| Keyword(4) | frequency synthesizer |
| 1st Author's Name | Kenro HIRATA |
| 1st Author's Affiliation | Information Technology R&D Center Mitsubishi Electric Corporation() |
| 2nd Author's Name | Hisao TACHIKA |
| 2nd Author's Affiliation | Information Technology R&D Center Mitsubishi Electric Corporation |
| 3rd Author's Name | Tadashi FUJINO |
| 3rd Author's Affiliation | Information Technology R&D Center Mitsubishi Electric Corporation |
| Date | 1996/1/25 |
| Paper # | RCS95-119 |
| Volume (vol) | vol.95 |
| Number (no) | 490 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |