| Presentation | 2001/7/18 An architectural design of SubBytes and MixColumns for AES cryptography Hidenori Seike, Takakazu Kurokawa, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, security of DES is decreasing according to the progress of network technology as well as computer science.As a result, NIST carried out the standardization of AES and decided Rijndael for AES last year.In this paper, we designed SubBytes and MixColumns transformations in various ways to realize an AES hardware system on a EPGA chip.Their performance is evaluated through their speed and circuit size. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | AES / Rijndael / FPGA / hardware / SubBytes / MixColumns |
| Paper # | ISEC2001-35 |
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| Conference Information | |
| Committee | ISEC |
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| Conference Date | 2001/7/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Information Security (ISEC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An architectural design of SubBytes and MixColumns for AES cryptography |
| Sub Title (in English) | |
| Keyword(1) | AES |
| Keyword(2) | Rijndael |
| Keyword(3) | FPGA |
| Keyword(4) | hardware |
| Keyword(5) | SubBytes |
| Keyword(6) | MixColumns |
| 1st Author's Name | Hidenori Seike |
| 1st Author's Affiliation | Department of Computer Science, National Defense Academy() |
| 2nd Author's Name | Takakazu Kurokawa |
| 2nd Author's Affiliation | Department of Computer Science, National Defense Academy |
| Date | 2001/7/18 |
| Paper # | ISEC2001-35 |
| Volume (vol) | vol.101 |
| Number (no) | 214 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |