Presentation | 2000/9/22 Software implementation of FEAL-NX Hiroaki Ootsuka, Hiroki Ueda, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | With respect to speed and memory size, mechanisms using symmetric encipherment algorithms are suitable to the implement with low-end devices. One of examples is entity authentication using smart cards. This paper describes and evaluates the performance of software implementation of FEAL-32X on the Z80. It uses 8 bytes of RAM and 216 bytes of ROM, and takes 6185 states/block on the Z80 in the data randomizing part. Furthermore, we discuss how this implementation is optimized by comparing with ideal models. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | symmetric encipherment / software implementation / smart cards / FEAL / Z80 |
Paper # | ISEC2000-70 |
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Conference Information | |
Committee | ISEC |
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Conference Date | 2000/9/22(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Information Security (ISEC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Software implementation of FEAL-NX |
Sub Title (in English) | |
Keyword(1) | symmetric encipherment |
Keyword(2) | software implementation |
Keyword(3) | smart cards |
Keyword(4) | FEAL |
Keyword(5) | Z80 |
1st Author's Name | Hiroaki Ootsuka |
1st Author's Affiliation | NTT Information Sharing Platform Laboratories() |
2nd Author's Name | Hiroki Ueda |
2nd Author's Affiliation | NTT Information Sharing Platform Laboratories |
Date | 2000/9/22 |
Paper # | ISEC2000-70 |
Volume (vol) | vol.100 |
Number (no) | 324 |
Page | pp.pp.- |
#Pages | 18 |
Date of Issue |