Presentation 2000/3/16
A Bi-orthogonal Modulation System using a Delay Lock Loop
Hiromasa Habuchi, Yasuo Usui,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this paper, a bi-orthogonal modulation system using a Delay Lock Loop and a differential detector is proposed. The synchronization performance and the bit error rate performance by taking account of the tracking performance are evaluated by theoretical analysis. The proposed system uses column sequences which consist of the two separate sequences, that is, an anterior sequence and a posterior sequence. Because the particular sequence always appears by multiplying the anterior sequence by the posterior sequence, the proposed system can extract the timing imformation from the received signal itself. The bit error rate performance of the proposed system is the same as the lower bound of the Bi-orthogonal modulation system. It is found that the proposed system is surperior to the bi-orthogonal modulation system using the transmitting synchronizing sequence.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) bi-orthogonal modulation system / bit error rate / tracking performance / Delay Lock Loop / column sequence
Paper # IT99-68,ISEC99-107,SST99-116
Date of Issue

Conference Information
Committee ISEC
Conference Date 2000/3/16(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Information Security (ISEC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Bi-orthogonal Modulation System using a Delay Lock Loop
Sub Title (in English)
Keyword(1) bi-orthogonal modulation system
Keyword(2) bit error rate
Keyword(3) tracking performance
Keyword(4) Delay Lock Loop
Keyword(5) column sequence
1st Author's Name Hiromasa Habuchi
1st Author's Affiliation Information Processing Center, IBARAKI University()
2nd Author's Name Yasuo Usui
2nd Author's Affiliation Department of Computer and Information Sciences, Faculty of Engineering, IBARAKI University
Date 2000/3/16
Paper # IT99-68,ISEC99-107,SST99-116
Volume (vol) vol.99
Number (no) 701
Page pp.pp.-
#Pages 5
Date of Issue