| Presentation | 1997/3/18 Performance Improvement on the Synchronization System with Racing Counters by Increasing the Number of Reference Frames Kouji OHUCHI, Hiromasa HABUCHI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | M-ary/SS communication systems can improve bit error rate performance under the condition that in which there is an additive white Gaussian noise. Synchronization of M-ary/SS communication systems is difficult, however, because M-ary/SS communication systems have several spreading sequences. The authors proposed the simple frame synchronization system which uses several chips of the spreading sequence as frame synchronization signal. The bit error rate in this system deteriorates as the synchronization performance improves. In this paper, a frame synchronization system which reduces the performance degradation is proposed. In this system, a frame synchronization signal is produced from the synchronizing chip in several frames. As the result, when the synchronization signal are detected by correlation decision, the bit error rate performance improves as the number of reference frames increases. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | M-ary/SS Communication systems / Frame Synchronization / Synchronizing Chip / Racing Counters |
| Paper # | IT96-73,ISEC96-65,SST96-80 |
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| Conference Information | |
| Committee | ISEC |
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| Conference Date | 1997/3/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Information Security (ISEC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance Improvement on the Synchronization System with Racing Counters by Increasing the Number of Reference Frames |
| Sub Title (in English) | |
| Keyword(1) | M-ary/SS Communication systems |
| Keyword(2) | Frame Synchronization |
| Keyword(3) | Synchronizing Chip |
| Keyword(4) | Racing Counters |
| 1st Author's Name | Kouji OHUCHI |
| 1st Author's Affiliation | Department of Computer and Information Sciences Faculty of Engineering, IBARAKI University() |
| 2nd Author's Name | Hiromasa HABUCHI |
| 2nd Author's Affiliation | Department of Computer and Information Sciences Faculty of Engineering, IBARAKI University |
| Date | 1997/3/18 |
| Paper # | IT96-73,ISEC96-65,SST96-80 |
| Volume (vol) | vol.96 |
| Number (no) | 588 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |