| Presentation | 1997/3/18 An Application of VSR-PLL to Broadband Spread-Spectrum Direct-Wave Reception Systems Masanori HAMAMURA, Shin'ichi TACHIKAWA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Vehicular speed response phase locked loop (VSR-PLL) is a new circuit to remove a steady-state frequency offset caused by Doppler shift in mobile communications. In this report, VSR-PLL will be applied to broadband spread-spectrum direct-wave reception system (BSS-DR system) on a line-of-sight communication channel. The performance analysis of BSS-DR system with VSR-PLL is achieved by considering the effects of steady-state and instantaneous frequency offset of received signals, and the characteristics of bit-error rate (BER) are shown as compared to that with conventional phase locked loop (conventional PLL). As a result, by using VSR-PLL, we can obtain the advantage of 3 dB of SNR at BER of 10^<-2>. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ITS / spread spectrum / Ricean fading / millimeter wave / PLL / direct-wave reception System |
| Paper # | IT96-69,ISEC96-61,SST96-76 |
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| Conference Information | |
| Committee | ISEC |
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| Conference Date | 1997/3/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Assistant | |
| Paper Information | |
| Registration To | Information Security (ISEC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Application of VSR-PLL to Broadband Spread-Spectrum Direct-Wave Reception Systems |
| Sub Title (in English) | |
| Keyword(1) | ITS |
| Keyword(2) | spread spectrum |
| Keyword(3) | Ricean fading |
| Keyword(4) | millimeter wave |
| Keyword(5) | PLL |
| Keyword(6) | direct-wave reception System |
| 1st Author's Name | Masanori HAMAMURA |
| 1st Author's Affiliation | Tachikawa lab., Department of Electrical Engineering, Nagaoka University of Technology() |
| 2nd Author's Name | Shin'ichi TACHIKAWA |
| 2nd Author's Affiliation | Tachikawa lab., Department of Electrical Engineering, Nagaoka University of Technology |
| Date | 1997/3/18 |
| Paper # | IT96-69,ISEC96-61,SST96-76 |
| Volume (vol) | vol.96 |
| Number (no) | 588 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |