Presentation 1999/6/24
A study on a pixel level A/D converter for super high-speed
Shoji KAWAHITO, Daisuke MIYAZAKI, Yoshiaki TADOKORO,
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Abstract(in English) This paper describes a pixel-level analog-to-digital converter for super high-speed camera systems whose frame rate are over 10000flame/s. The pixel-level A/D converter should have sufficiently low fixed pattern noise. To achieve this, we proposed a total scheme of the pixel level integration-type A/D converter in which the deviations of sensor circuit offset, interator gain and offset, and comparator offset are all cancelled out. The basic operation of the A/D converter is confirmed by SPICE simulations. The power dissipation in each pixel is esitimated to be 5μW which corresponds to the total power dissipation of 328mW for 256×256 pixel sensor array.
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Keyword(in English) CMOS image sensor / pixel parallel processing / A/D converter / high-speed imaging
Paper # EID99-12
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Conference Date 1999/6/24(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A study on a pixel level A/D converter for super high-speed
Sub Title (in English)
Keyword(1) CMOS image sensor
Keyword(2) pixel parallel processing
Keyword(3) A/D converter
Keyword(4) high-speed imaging
1st Author's Name Shoji KAWAHITO
1st Author's Affiliation Department of Information and Computer Sciences Toyohashi Univer of Technology()
2nd Author's Name Daisuke MIYAZAKI
2nd Author's Affiliation Department of Information and Computer Sciences Toyohashi Univer of Technology
3rd Author's Name Yoshiaki TADOKORO
3rd Author's Affiliation Department of Information and Computer Sciences Toyohashi Univer of Technology
Date 1999/6/24
Paper # EID99-12
Volume (vol) vol.99
Number (no) 143
Page pp.pp.-
#Pages 6
Date of Issue