Presentation 1995/12/8
Single Chip ATM Switch for Desktop
Ruixue Fan, Nobuyuki Mizukoshi, Hiroshi Nagano, Masayuki Shinohara, Noboru Sato, Hiroshi Suzuki,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Single chip shared buffer ATM switch for desktop with 1.2 Gbps is proposed. This single chip ATM switch can support different transfer speed ports with standard UTOPIA level 2 interface. The low cost implementation of the cell buffers, HTT (Header Translation Table) and control memory is realized by the use of external SRAM chips. Re-queueing method for copying cells achieves the high throughput for multicast services. The QoS guarantee control of multi-class services is realized by framed scheduling control and WFQ (Weighted Fairness Queuing) control. ABR control and EPD (Early Packet Discard) are also implemented for data services.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) ATM Switch / Desktop / Shared Buffer / Multicast / QoS
Paper # SSE95-125
Date of Issue

Conference Information
Committee SSE
Conference Date 1995/12/8(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Switching Systems Engineering (SSE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Single Chip ATM Switch for Desktop
Sub Title (in English)
Keyword(1) ATM Switch
Keyword(2) Desktop
Keyword(3) Shared Buffer
Keyword(4) Multicast
Keyword(5) QoS
1st Author's Name Ruixue Fan
1st Author's Affiliation C&C Research Laboratories, NEC Corporation()
2nd Author's Name Nobuyuki Mizukoshi
2nd Author's Affiliation ULSI Systems Development Laboratories, NEC Corporation
3rd Author's Name Hiroshi Nagano
3rd Author's Affiliation NEC Communication Systems Kyushu
4th Author's Name Masayuki Shinohara
4th Author's Affiliation C&C Research Laboratories, NEC Corporation
5th Author's Name Noboru Sato
5th Author's Affiliation ULSI Systems Development Laboratories, NEC Corporation
6th Author's Name Hiroshi Suzuki
6th Author's Affiliation C&C Research Laboratories, NEC Corporation
Date 1995/12/8
Paper # SSE95-125
Volume (vol) vol.95
Number (no) 398
Page pp.pp.-
#Pages 6
Date of Issue