| Presentation | 2001/9/7 Comparative Studies on Auxiliary Active Resonant DC Link Snubber Circuit Topologies for Soft Switching Sinewave Pulse Modulated Inverters Yoshihiko Hirota, Masanobu Yoshida, Rukonuzzaman Md, Eiji Hiraki, Mutsuo Nakaoka, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents three proto types of auxiliary active resonant DC link snubber circuit topology for soft switching PWM inverter and their comparative considerations. In this paper, the operation principles and characteristics of their auxiliary active resonant DC link snubber circuits are described for the basic circuit features. The single phase PWM inverters with their auxiliary active resonant DC link snubber circuits treated here are evaluated with aid of computer simulation. Furthermore, by introducing power losses data of IGBTs and diodes to their simulation programs, their efficiencies are discussed and evaluated for each soft switching inverter using IGBTs. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Voltage Source Single Phase Inverter / Auxiliary Active Resonant DC Link Snubbers / Soft Switching / Power Loss Analysis |
| Paper # | EE2001-27 |
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| Committee | EE |
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| Conference Date | 2001/9/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Energy Engineering in Electronics and Communications (EE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Comparative Studies on Auxiliary Active Resonant DC Link Snubber Circuit Topologies for Soft Switching Sinewave Pulse Modulated Inverters |
| Sub Title (in English) | |
| Keyword(1) | Voltage Source Single Phase Inverter |
| Keyword(2) | Auxiliary Active Resonant DC Link Snubbers |
| Keyword(3) | Soft Switching |
| Keyword(4) | Power Loss Analysis |
| 1st Author's Name | Yoshihiko Hirota |
| 1st Author's Affiliation | Department of Electrical and Electronics Engineering, The Graduate School of Science and Engineering, Yamaguchi University.() |
| 2nd Author's Name | Masanobu Yoshida |
| 2nd Author's Affiliation | Department of Electrical and Electronics Engineering, The Graduate School of Science and Engineering, Yamaguchi University. |
| 3rd Author's Name | Rukonuzzaman Md |
| 3rd Author's Affiliation | Department of Electrical and Electronics Engineering, The Graduate School of Science and Engineering, Yamaguchi University. |
| 4th Author's Name | Eiji Hiraki |
| 4th Author's Affiliation | Department of Electrical and Electronics Engineering, The Graduate School of Science and Engineering, Yamaguchi University. |
| 5th Author's Name | Mutsuo Nakaoka |
| 5th Author's Affiliation | Department of Electrical and Electronics Engineering, The Graduate School of Science and Engineering, Yamaguchi University. |
| Date | 2001/9/7 |
| Paper # | EE2001-27 |
| Volume (vol) | vol.101 |
| Number (no) | 293 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |