| Presentation | 2002/2/25 Hardware Compilation Techniques for Real-Time Systems Ian Page, Mat Newman, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Many choices of processing components face the designer of today's real-time systems, including CPU, DSP, FPGA, and ASIC. With such systems increasing in complexity it is often the development tools and runtime environments that make or break a project. This paper presents Handel-C and DKl which provide a new approach to rapid design that allows application specialists (software or hardware professionals) to increase their productivity and implement and execute algorithms directly on FPGA silicon. As design is so much faster than conventional methodologies, it is routinely possible to investigate many more architectural possibilities within a fixed design timeframe and so produce improved designs. This is illustrated using an evaluation project where hardware acceleration of a video encryption processing bottleneck was implemented using these tools and the subsequent throughput improvement assessed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Handel-C / Celoxica / FPGA/PLD / Reconfigurable / Hardware Compilation / Parallel Programming |
| Paper # | CPSY2001-105 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2002/2/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hardware Compilation Techniques for Real-Time Systems |
| Sub Title (in English) | |
| Keyword(1) | Handel-C |
| Keyword(2) | Celoxica |
| Keyword(3) | FPGA/PLD |
| Keyword(4) | Reconfigurable |
| Keyword(5) | Hardware Compilation |
| Keyword(6) | Parallel Programming |
| 1st Author's Name | Ian Page |
| 1st Author's Affiliation | Celoxica Ltd.:Imperial College of Science and Technology, University of London() |
| 2nd Author's Name | Mat Newman |
| 2nd Author's Affiliation | SVP Technology, Celoxica Ltd. |
| Date | 2002/2/25 |
| Paper # | CPSY2001-105 |
| Volume (vol) | vol.101 |
| Number (no) | 671 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |