| Presentation | 2001/4/6 Multi-Path Execution on SMT for Next Trace Prediction Masamichi TAKAGI, Kei HIRAKI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Branch misprediction penalty of a processor grows as the pipeline deepens. We employ multi-path execution to reduce the penalty. To reduce the cost of speculative fork or join, we use Simultaneous Multithreading (SMT). To boost the effective fetch rate which decreases on multi-path execution, we use trace as an unit of multi-path execution. Because the processor can follow only limited number of paths simultaneously, we need to choose paths which are most likely to be on the correct path. For this purpose, we introduce a fork policy which predicts the execution probability of a path candidate dynamically. We evalutate the proposed architecture under the proposed policy and others with a simulator. In the best case, the architecture yields 16.0% speedup over the case without multi-path execution. The proposed policy produces more stable speedup than other simple policies on the programs with different characteristics, and the policy produces almost the same speedup as the ideal policies. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | multiple path execution / simultaneous multithreading / SMT / trace cache / trace / confidence |
| Paper # | CPSY2001-10,FTS2001-10 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2001/4/6(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Multi-Path Execution on SMT for Next Trace Prediction |
| Sub Title (in English) | |
| Keyword(1) | multiple path execution |
| Keyword(2) | simultaneous multithreading |
| Keyword(3) | SMT |
| Keyword(4) | trace cache |
| Keyword(5) | trace |
| Keyword(6) | confidence |
| 1st Author's Name | Masamichi TAKAGI |
| 1st Author's Affiliation | Department of Information Science, Graduate School of Science, The University of Tokyo() |
| 2nd Author's Name | Kei HIRAKI |
| 2nd Author's Affiliation | Department of Information Science, Graduate School of Science, The University of Tokyo |
| Date | 2001/4/6 |
| Paper # | CPSY2001-10,FTS2001-10 |
| Volume (vol) | vol.101 |
| Number (no) | 2 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |