| Presentation | 1999/4/15 Design of GaAs Motion Vector Estimation Circuit T. Enomoto, A. Hirobe, T. Satoh, M. Fujii, N. Yoshida, S. Wada, M. Tokushima, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A very small GaAs motion vector estimation (ME) circuit was proposed for future wireless video communication. Compared to a CMOS ME array, number of FETs was considerably reduced to 2,200 by a factor of 30, and chip size was reduced to 2.4mm^2 by a factor of 4, while the signal processing capability of 3.5 GOPS was kept as the same as that of the CMOS ME array. To construct the GaAs ME array a 16-bit binary look-ahead carry (BLC) adder (1.67GHz, 134.4mW at 0.6V) and a delay flip-flop (5.17GHz, 2.03mW at 0.6V) were fabricated by using 0.25-μm GaAs HEMT technology. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | adder / delay flip-flop / power dissipation / encoding / motion vector estimation / GaAs |
| Paper # | CPSY99-3 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1999/4/15(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of GaAs Motion Vector Estimation Circuit |
| Sub Title (in English) | |
| Keyword(1) | adder |
| Keyword(2) | delay flip-flop |
| Keyword(3) | power dissipation |
| Keyword(4) | encoding |
| Keyword(5) | motion vector estimation |
| Keyword(6) | GaAs |
| 1st Author's Name | T. Enomoto |
| 1st Author's Affiliation | Graduate School of Science and Engineering, Chuo University() |
| 2nd Author's Name | A. Hirobe |
| 2nd Author's Affiliation | Graduate School of Science and Engineering, Chuo University |
| 3rd Author's Name | T. Satoh |
| 3rd Author's Affiliation | Graduate School of Science and Engineering, Chuo University |
| 4th Author's Name | M. Fujii |
| 4th Author's Affiliation | Optoelectronics and High Frequency Device Res.Labs., NEC Corp. |
| 5th Author's Name | N. Yoshida |
| 5th Author's Affiliation | Optoelectronics and High Frequency Device Res.Labs., NEC Corp. |
| 6th Author's Name | S. Wada |
| 6th Author's Affiliation | Optoelectronics and High Frequency Device Res.Labs., NEC Corp. |
| 7th Author's Name | M. Tokushima |
| 7th Author's Affiliation | Optoelectronics and High Frequency Device Res.Labs., NEC Corp. |
| Date | 1999/4/15 |
| Paper # | CPSY99-3 |
| Volume (vol) | vol.99 |
| Number (no) | 5 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |