Presentation 1994/4/21
Experiment of Faults on the"Happa″Parallel Computer with 64 PEs a nd Design for Fault
Kazuhiko Iwasaki, Hideyuki Yoshikawa, Akinori Furuta,
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Abstract(in English) The operating range for the ″Happa″ system was examined.The Hap pa is a multiple microprocessor system using 64 PEs.Faults were experimentaly observed for the boundary of the operating range.Bus read(from the master processor)faults,bus control line faults,mesh connection faults,raising-hand circuit faults,synchronization faults,and others were detected.From the experiment a design technique for the bus faults,attaching a backup RAM,is proposed. The technique is compared with conventional ones.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) parallel computer / fault observation / fault-tolerance / backup RAM
Paper # CPSY94-3,FTS94-3,ICD94-3
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Committee CPSY
Conference Date 1994/4/21(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Experiment of Faults on the"Happa″Parallel Computer with 64 PEs a nd Design for Fault
Sub Title (in English)
Keyword(1) parallel computer
Keyword(2) fault observation
Keyword(3) fault-tolerance
Keyword(4) backup RAM
1st Author's Name Kazuhiko Iwasaki
1st Author's Affiliation Faculty of Engineering,Chiba University()
2nd Author's Name Hideyuki Yoshikawa
2nd Author's Affiliation Faculty of Engineering,Chiba University
3rd Author's Name Akinori Furuta
3rd Author's Affiliation Faculty of Engineering,Chiba University
Date 1994/4/21
Paper # CPSY94-3,FTS94-3,ICD94-3
Volume (vol) vol.94
Number (no) 14
Page pp.pp.-
#Pages 6
Date of Issue