Presentation 1994/4/21
On a lealization of A/D converter using error-tolerating codes
Kyoya Kawamura, Takashi Matsubara, Yoshiaki Koga,
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Abstract(in English) Flash-Type A, D converters with parallel comparators are used extensively for high rate analog to digital conversion such as video signal digitizers and so on,and there exist conversion errors due to propagation delays in part of great many comparators. To reduce errors,several technologies have been developed up to present.We presented already an error approximating procedure of A/ D converter.In this paper,we propose a realization of A/D converter with great many comparators using error-tolerating codes and discuss some dependable characteristics of the proposed realization of A/D converter.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) fault tolerance / error-tolerating codes / error detection / error correction / flash-type A/ converter
Paper # CPSY94-2,FTS94-2,ICD94-2
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Conference Information
Committee CPSY
Conference Date 1994/4/21(1days)
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Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) On a lealization of A/D converter using error-tolerating codes
Sub Title (in English)
Keyword(1) fault tolerance
Keyword(2) error-tolerating codes
Keyword(3) error detection
Keyword(4) error correction
Keyword(5) flash-type A/ converter
1st Author's Name Kyoya Kawamura
1st Author's Affiliation Department of Computer Science,National Defense Academy()
2nd Author's Name Takashi Matsubara
2nd Author's Affiliation Department of Computer Science,National Defense Academy
3rd Author's Name Yoshiaki Koga
3rd Author's Affiliation Department of Computer Science,National Defense Academy
Date 1994/4/21
Paper # CPSY94-2,FTS94-2,ICD94-2
Volume (vol) vol.94
Number (no) 14
Page pp.pp.-
#Pages 6
Date of Issue