Presentation | 1994/7/22 Optimizing Hyperscalar Compiler : Software Pipelining with Stage- Balancing Yasuhiko Saitoh, Kazuaki Murakami, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Software pipelining,one of loop optimizing techniques,exploits instruction-level parallelism.To apply software pipelining to hyperscalar processors,we must consider a new constraint due to the limited Capacity of instruction registers,which does not exist in superscalar processors.So,we could not use modulo variable expansion to eliminate anti-dependency,lbecause it increases code size.We propose a new approach,called stage-balancing algorithm,to solve the anti-dependency problem in hyperscalar processors. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Superscalar processor / VLIW / Software pipelining / Hyperscalar processor / Stage-balancing / Optimizing Compiler |
Paper # | CPSY94-37 |
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Committee | CPSY |
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Conference Date | 1994/7/22(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Computer Systems (CPSY) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Optimizing Hyperscalar Compiler : Software Pipelining with Stage- Balancing |
Sub Title (in English) | |
Keyword(1) | Superscalar processor |
Keyword(2) | VLIW |
Keyword(3) | Software pipelining |
Keyword(4) | Hyperscalar processor |
Keyword(5) | Stage-balancing |
Keyword(6) | Optimizing Compiler |
1st Author's Name | Yasuhiko Saitoh |
1st Author's Affiliation | Interdisciplinary Graduate School of Engineering Sciences,Kyushu University() |
2nd Author's Name | Kazuaki Murakami |
2nd Author's Affiliation | Interdisciplinary Graduate School of Engineering Sciences,Kyushu University |
Date | 1994/7/22 |
Paper # | CPSY94-37 |
Volume (vol) | vol.94 |
Number (no) | 163 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |