Presentation 1994/7/22
On Parallelization of INSIGHT an Interconnection Network Simulator
Hidetomo Shibamura, Morihiro Kuga, Toshinori Sueyoshi,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper proposes parallelization of an interconnection network simulator INSIGHT,to evaluate the performance of large- scale interconnection network which connects over tens of thousand of processor elements for massively paralle computer in short period.The parallel processing INSIGHT was developed to cope with the increasing of the simulation period due to the expanding of the interconnection network,and the complexity of the simulation parameters.INSIGHT was implemented on the highly-parallel computer AP1000 with hardware barrier synchronization mechanism in order to support centlized time management.Under the following condition i. e.,4,096 nodes,2-dimensional torus network,wormhole as flow control,and e-cube routing,the sequential processing INSIGHT spent about 15 hours on simulation.The parallel processing INSIGHT took only about 18 minutes and about 50 times speeding up is achived.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Interconnection network / Massively parallel computer / Parallel simulation / Performance evaluation
Paper # CPSY94-32
Date of Issue

Conference Information
Committee CPSY
Conference Date 1994/7/22(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) On Parallelization of INSIGHT an Interconnection Network Simulator
Sub Title (in English)
Keyword(1) Interconnection network
Keyword(2) Massively parallel computer
Keyword(3) Parallel simulation
Keyword(4) Performance evaluation
1st Author's Name Hidetomo Shibamura
1st Author's Affiliation Center for Microelectronic Systems,Kyushu Institute of Technology()
2nd Author's Name Morihiro Kuga
2nd Author's Affiliation Center for Microelectronic Systems,Kyushu Institute of Technology
3rd Author's Name Toshinori Sueyoshi
3rd Author's Affiliation Department of Artificial Intelligence,Kyushu Institute of Technology
Date 1994/7/22
Paper # CPSY94-32
Volume (vol) vol.94
Number (no) 163
Page pp.pp.-
#Pages 8
Date of Issue