| Presentation | 1998/10/16 A 256 Byte Embedded FeRAM Macro Cell for a Smart Card Microcontroller Tohru Miwa, Junichi Yamada, Yuji Okamoto, Hiroki Koike, Hideo Toyoshima, Hiromitsu Hada, Yoshihiro Hayashi, Hiroaki Okizaki, Yoichi Miyasaka, Takemitsu Kunio, Hidenobu Miyamoto, Hideki Gomi, Hiroshi Kitajima, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes the circuit technologies and the experimental results for an embedded FeRAM macro cell for a smart card microcontroller. This macro cell employs a 256 byte 2T/2C FeRAM cell array for rewritable nonvolatile memory storage. The macro cell performs read/write operations that are fully synchronous with the microprocessor core, and its write operations are over 1000 times faster than the program operations of a conventional EEPROM macro cell. The macro cell is provided with developed offset sense amplifiers for screening out any weak cells in write endurance. With a small memory cell, as well as a small charge pumping circuit and write circuits, the FeRAM macro cell occupies only half the area of an EEPROM macro. A prototype microcontroller provided with the FeRAM macro cell is fabricated in a standard double metal layer CMOS process with added ferroelectric capacitor process steps. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Ferroelectric Memory / Non-volatile Memory / Macro cell / Smart card |
| Paper # | DSP98-106,ICD98-193,CPSY98-108 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1998/10/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 256 Byte Embedded FeRAM Macro Cell for a Smart Card Microcontroller |
| Sub Title (in English) | |
| Keyword(1) | Ferroelectric Memory |
| Keyword(2) | Non-volatile Memory |
| Keyword(3) | Macro cell |
| Keyword(4) | Smart card |
| 1st Author's Name | Tohru Miwa |
| 1st Author's Affiliation | Silicon Systems Research Laboratories, NEC Corporation() |
| 2nd Author's Name | Junichi Yamada |
| 2nd Author's Affiliation | Silicon Systems Research Laboratories, NEC Corporation |
| 3rd Author's Name | Yuji Okamoto |
| 3rd Author's Affiliation | First Microcomputer Development Department, NEC IC Microcomputer Systems, Ltd. |
| 4th Author's Name | Hiroki Koike |
| 4th Author's Affiliation | Silicon Systems Research Laboratories, NEC Corporation |
| 5th Author's Name | Hideo Toyoshima |
| 5th Author's Affiliation | Silicon Systems Research Laboratories, NEC Corporation |
| 6th Author's Name | Hiromitsu Hada |
| 6th Author's Affiliation | Silicon Systems Research Laboratories, NEC Corporation |
| 7th Author's Name | Yoshihiro Hayashi |
| 7th Author's Affiliation | Silicon Systems Research Laboratories, NEC Corporation |
| 8th Author's Name | Hiroaki Okizaki |
| 8th Author's Affiliation | Microcomputer Division, NEC Corporation |
| 9th Author's Name | Yoichi Miyasaka |
| 9th Author's Affiliation | Fundamental Research Laboratories, NEC Corporation |
| 10th Author's Name | Takemitsu Kunio |
| 10th Author's Affiliation | Silicon Systems Research Laboratories, NEC Corporation |
| 11th Author's Name | Hidenobu Miyamoto |
| 11th Author's Affiliation | ULSI Device Development Laboratories, NEC Corporation |
| 12th Author's Name | Hideki Gomi |
| 12th Author's Affiliation | ULSI Device Development Laboratories, NEC Corporation |
| 13th Author's Name | Hiroshi Kitajima |
| 13th Author's Affiliation | ULSI Device Development Laboratories, NEC Corporation |
| Date | 1998/10/16 |
| Paper # | DSP98-106,ICD98-193,CPSY98-108 |
| Volume (vol) | vol.98 |
| Number (no) | 323 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |