| Presentation | 1995/12/11 A Configuration of an I/O Network of the Massively Parallel Computer JUMP-1 Hironori Nakajo, Tomoyuki Nakano, Yukio Kaneda, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | JUMP-1 is a massively, parallel computer which consists of multiple clusters providing inter-processor communication and synchronization mechanism via broad bandwidth hierarchical torus network called RDT, and supports an efficient distributed shared-memory with multiple coherence protocols using Memory Based Processor (MBP). In this paper, we survey some researches on parallel I/O and summarize characteristics of each system. Next, we describe the configuration of an I/O Network architecture of a scalable I/O subsystem in JUMP-1. We adopt Digital Signal Processor (DSP) as an I/O network router which controls routing of 3 channels fast serial links (STAFF-Link). |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Massively Parallel Computer / JUMP-1 / Parallel I/O / STAFF-Link |
| Paper # | CPSY95-89,DE95-75 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1995/12/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Configuration of an I/O Network of the Massively Parallel Computer JUMP-1 |
| Sub Title (in English) | |
| Keyword(1) | Massively Parallel Computer |
| Keyword(2) | JUMP-1 |
| Keyword(3) | Parallel I/O |
| Keyword(4) | STAFF-Link |
| 1st Author's Name | Hironori Nakajo |
| 1st Author's Affiliation | Department of Computer and Systems Engineering, Faculty of Engineering, Kobe University() |
| 2nd Author's Name | Tomoyuki Nakano |
| 2nd Author's Affiliation | Department of Computer and Systems Engineering, Faculty of Engineering, Kobe University |
| 3rd Author's Name | Yukio Kaneda |
| 3rd Author's Affiliation | Department of Computer and Systems Engineering, Faculty of Engineering, Kobe University |
| Date | 1995/12/11 |
| Paper # | CPSY95-89,DE95-75 |
| Volume (vol) | vol.95 |
| Number (no) | 407 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |