| Presentation | 1995/4/28 A design method for asynchronous combinational circuits from BDD. Yoichiro Ueno, Masashi Imai, Takashi Nanya, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper we present a method to synthesize 2-rail 2-phase asynchronous circuits by permuting the nonterminal vertices of the BDD of a logical function with selector circuits. This method reduces the amount of circuit necessary for a gate-level quasi-delay insensitive asynchronous combinational circuit. In addition we demonstrate that, extending this method, it is possible to synthesize multi-valued input/output asynchronous combinational circuits, and multiple-output asynchronous combinational circuit. We also present a gate-level circuit and a transistor-level circuit synthesized using this method. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | asynchronous circuit / 2 rail 2 phase / combinational circuit / binary decision diagram / DCVSL |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1995/4/28(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A design method for asynchronous combinational circuits from BDD. |
| Sub Title (in English) | |
| Keyword(1) | asynchronous circuit |
| Keyword(2) | 2 rail 2 phase |
| Keyword(3) | combinational circuit |
| Keyword(4) | binary decision diagram |
| Keyword(5) | DCVSL |
| 1st Author's Name | Yoichiro Ueno |
| 1st Author's Affiliation | Department of Computer Science, Tokyo Institute of Technology() |
| 2nd Author's Name | Masashi Imai |
| 2nd Author's Affiliation | Department of Computer Science, Tokyo Institute of Technology |
| 3rd Author's Name | Takashi Nanya |
| 3rd Author's Affiliation | Department of Computer Science, Tokyo Institute of Technology |
| Date | 1995/4/28 |
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| Volume (vol) | vol.95 |
| Number (no) | 21 |
| Page | pp.pp.- |
| #Pages | 8 |
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