| Presentation | 1995/4/27 Circuit constraction for Thinning using ν MOS Cellular Automata Masayuki Ikebe, Koji Kameishi, Yoshihito Amemiya, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We proposed a cellular-automaton circuit that can perform picture thinning by template matching. We designed the circuit compactly by using ν MOS FETs and analyzed its operation using a circuit simulater. A high-speed operation up to 150-MHz clock frequency was obtained. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | non-boolean logic / cellular-automaton / νMOS FET / functinal device |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1995/4/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Circuit constraction for Thinning using ν MOS Cellular Automata |
| Sub Title (in English) | |
| Keyword(1) | non-boolean logic |
| Keyword(2) | cellular-automaton |
| Keyword(3) | νMOS FET |
| Keyword(4) | functinal device |
| 1st Author's Name | Masayuki Ikebe |
| 1st Author's Affiliation | Faculty of Engineering, Hokkaido University() |
| 2nd Author's Name | Koji Kameishi |
| 2nd Author's Affiliation | Faculty of Engineering, Hokkaido University |
| 3rd Author's Name | Yoshihito Amemiya |
| 3rd Author's Affiliation | Faculty of Engineering, Hokkaido University |
| Date | 1995/4/27 |
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| Volume (vol) | vol.95 |
| Number (no) | 20 |
| Page | pp.pp.- |
| #Pages | 6 |
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