| Presentation | 1995/4/27 A Study of an On-chip Multiprocessor Architecture Masafumi Takahashi, Hiroyuki Takano, Seigo Suzuki, Haruyuki Tago, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 500-MHz on-chip multiprocessor architecture using leading edge VLSI technology is proposed for multimedia applications. A new bus control mechanism and a cache coherence protocol are introduced, which effectively reduce shared-bus congestion and external memory access. Simulation results of Radiosity show that the on-chip multiprocessor model operates about two times faster than a conventional on-board multiprocessor model using commercial microprocessors. With four processors on a chip, the shared-bus transaction overhead is reduced to 12% of the total execution time at 500MHz. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | multiprocessor / shared bus / cache coherence protocol / multimedia / radiosity |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1995/4/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study of an On-chip Multiprocessor Architecture |
| Sub Title (in English) | |
| Keyword(1) | multiprocessor |
| Keyword(2) | shared bus |
| Keyword(3) | cache coherence protocol |
| Keyword(4) | multimedia |
| Keyword(5) | radiosity |
| 1st Author's Name | Masafumi Takahashi |
| 1st Author's Affiliation | Research and Development Center, Toshiba Corp.() |
| 2nd Author's Name | Hiroyuki Takano |
| 2nd Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 3rd Author's Name | Seigo Suzuki |
| 3rd Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 4th Author's Name | Haruyuki Tago |
| 4th Author's Affiliation | Research and Development Center, Toshiba Corp. |
| Date | 1995/4/27 |
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| Volume (vol) | vol.95 |
| Number (no) | 20 |
| Page | pp.pp.- |
| #Pages | 8 |
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