| Presentation | 1993/4/23 A Microprocessor for highend system and the hardware design example Masayuki Akiba, Tsuneo Takahashi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The Pentium^TM> microprocessor is the next generation member of intel microprocessor architecture family.It has a super scalar micro-architecture capable of executing two instructions in a single clock.A external 64bits data bus supports burst cycle and has 528 Mbytes, sec transfer rate at 66MHz.The Pentium^TM> processor power can be used at Desktop PC to Server segments.It need effective system design for these application segments. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | microprocessor / super scalar / data integrity / L2 cache / memory bus |
| Paper # | CPSY93-1,FTS93-1,ICD93-1 |
| Date of Issue |
| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1993/4/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Microprocessor for highend system and the hardware design example |
| Sub Title (in English) | |
| Keyword(1) | microprocessor |
| Keyword(2) | super scalar |
| Keyword(3) | data integrity |
| Keyword(4) | L2 cache |
| Keyword(5) | memory bus |
| 1st Author's Name | Masayuki Akiba |
| 1st Author's Affiliation | Field Application Group,Intel Japan() |
| 2nd Author's Name | Tsuneo Takahashi |
| 2nd Author's Affiliation | Field Application Group,Intel Japan |
| Date | 1993/4/23 |
| Paper # | CPSY93-1,FTS93-1,ICD93-1 |
| Volume (vol) | vol.93 |
| Number (no) | 16 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |