Presentation	1996/10/31 A New Architecture of Multi-Purpose Microprocessor -Bus Instruction Set Computer(BISC)- Yukihiko Yamashita,
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Abstract(in English)	In this paper, we propose a new architecture of a microprocessor called BISC(Bus Instruction Set Computer). This type of processor has only instructions for the transfer of data in registers by an internal bus. For example, it does not have Load or Store command. Therefore, since it's decoding of instructions is very simple, it does not need a pipeline process, and each part of the processor is highly independent to another part, it's structure is very simple. Furthermore, when we add functions to the processor, we dose not need to change the instruction set or the main structure of the processor. Therefore, for image processing, coding, etc., we can construct a processor which is suitable to such many purposes.
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Keyword(in English)	microprocessor / architecture / CISC / RISC / BISC
Paper #	CPSY96-70
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Conference Information
Committee	CPSY
Conference Date	1996/10/31(1days)
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Paper Information
Registration To	Computer Systems (CPSY)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	A New Architecture of Multi-Purpose Microprocessor -Bus Instruction Set Computer(BISC)-
Sub Title (in English)
Keyword(1)	microprocessor
Keyword(2)	architecture
Keyword(3)	CISC
Keyword(4)	RISC
Keyword(5)	BISC
1st Author's Name	Yukihiko Yamashita
1st Author's Affiliation	Department of International Development Engineering Faculty of Engineering Tokyo Institute of Technology()
Date	1996/10/31
Paper #	CPSY96-70
Volume (vol)	vol.96
Number (no)	342
Page	pp.pp.-
#Pages	6
Date of Issue