| Presentation | 1997/12/12 A Practical Row Interchanging Algorithm for Hierarchically Constructed Circuit Matrices using Modified Nodal Analysis Takashi Sato, Mikako Miyama, Goichi Yokomizo, Kojiro Niho, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, a practical row interchanging algorithm for hierarchically constructed matrices with MNA (Modified Nodal Approach) for circuit simulation is presented that permits arbitrary block partitioning with appropriate node number assignment for branch currents. This algorithm can completely replace the matrix setup procedure of both partitioned and non-partitioned SPICE based simulators. We evaluated our algorithm using actual circuits containing over 28000 components and 1950 branch current trees and which could not utilize circuit partitioning because of the zero pivot problem. Even with arbitrary block partitioning, the CPU time required for the row exchanging procedure was less than 0.1 seconds, which represents 44% reduction of the CPU time for transient analysis. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Circuit simulation / Modified Nodal Analysis / Row exchange / Circuit partitioning / SPICE / Pivot selection |
| Paper # | CPSY97-97 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 1997/12/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Practical Row Interchanging Algorithm for Hierarchically Constructed Circuit Matrices using Modified Nodal Analysis |
| Sub Title (in English) | |
| Keyword(1) | Circuit simulation |
| Keyword(2) | Modified Nodal Analysis |
| Keyword(3) | Row exchange |
| Keyword(4) | Circuit partitioning |
| Keyword(5) | SPICE |
| Keyword(6) | Pivot selection |
| 1st Author's Name | Takashi Sato |
| 1st Author's Affiliation | Semiconductor & Integrated Circuits Div., Hitachi Ltd.() |
| 2nd Author's Name | Mikako Miyama |
| 2nd Author's Affiliation | Semiconductor & Integrated Circuits Div., Hitachi Ltd. |
| 3rd Author's Name | Goichi Yokomizo |
| 3rd Author's Affiliation | Semiconductor & Integrated Circuits Div., Hitachi Ltd. |
| 4th Author's Name | Kojiro Niho |
| 4th Author's Affiliation | Semiconductor & Integrated Circuits Div., Hitachi Ltd. |
| Date | 1997/12/12 |
| Paper # | CPSY97-97 |
| Volume (vol) | vol.97 |
| Number (no) | 445 |
| Page | pp.pp.- |
| #Pages | 9 |
| Date of Issue | |