Presentation 2004/4/16
Performance of Timing Recovery Circuits for Multi-level QAM Burst-mode Transmission
Yushi SHIRATO, Kazuji Watanabe,
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Abstract(in English) In this paper, the authors proposed timing recovery circuits, which supports burst-mode operation and can handle multi-level QAM signals. The proposed circuits are composed of an acquisition circuit, which is characterized by the simple structure and the low operation speed, and a novel tracking circuit, which offers higher tracking ability. As the results of computer simulations, it is shown that the proposed acquisition circuit requires tens of preamble symbols to achieve RMS timing error within 5degree. It is also shown that the proposed tracking circuit minimizes the timing error, which is half as much as that of conventional one.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Timing Recovery / Multi-level QAM / Burst-mode Transmission / Tracking / Zero-crossing Method
Paper # RCS2004-30,CQ2004-30
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Committee CQ
Conference Date 2004/4/16(1days)
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Registration To Communication Quality (CQ)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Performance of Timing Recovery Circuits for Multi-level QAM Burst-mode Transmission
Sub Title (in English)
Keyword(1) Timing Recovery
Keyword(2) Multi-level QAM
Keyword(3) Burst-mode Transmission
Keyword(4) Tracking
Keyword(5) Zero-crossing Method
1st Author's Name Yushi SHIRATO
1st Author's Affiliation NTT Access Network Service Systems Laboratories, NTT Corporation()
2nd Author's Name Kazuji Watanabe
2nd Author's Affiliation NTT Access Network Service Systems Laboratories, NTT Corporation
Date 2004/4/16
Paper # RCS2004-30,CQ2004-30
Volume (vol) vol.104
Number (no) 22
Page pp.pp.-
#Pages 6
Date of Issue