Presentation 2002/12/6
A supervised learning rule using duality in neuron model
Kiichi YAMADA, Susumu KUROYANAGI, Akira IWATA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Duality is a property that is found to be exists between weight vector and the input vector of an artificial neuron model. When the desired value of synaptic weight is able to be obtained by an algorithm, the duality property enable us to also calculate the desired value of the input, simultaneously. Furthermore, when the input to a neuron model is obtained from output of the other neuron to which it is connected, the desired input of the former neuron is identical to the desired output of the latter. As an example, we propose a learning rule for a network that have an additional output layer to an LVQ network. The simulation result of a classification problem showed that the proposed algorithm outperformed the LVQ, and the category allocation to the neuron could be performed dynamically.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) duality / neural network / learning rule / LVQ
Paper # NC2002-90
Date of Issue

Conference Information
Committee NC
Conference Date 2002/12/6(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Neurocomputing (NC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A supervised learning rule using duality in neuron model
Sub Title (in English)
Keyword(1) duality
Keyword(2) neural network
Keyword(3) learning rule
Keyword(4) LVQ
1st Author's Name Kiichi YAMADA
1st Author's Affiliation Dept. of Electrical and Computer Eng., Nagoya Institute of Technology()
2nd Author's Name Susumu KUROYANAGI
2nd Author's Affiliation Dept. of Electrical and Computer Eng., Nagoya Institute of Technology
3rd Author's Name Akira IWATA
3rd Author's Affiliation Dept. of Electrical and Computer Eng., Nagoya Institute of Technology
Date 2002/12/6
Paper # NC2002-90
Volume (vol) vol.102
Number (no) 508
Page pp.pp.-
#Pages 6
Date of Issue