Presentation 2002/11/4
Hardware Implementation of Quantized Connection Nonmonotoinc Neural Networks and a Threshold Learning Algorithm
Takuya HAGA, Fumihiko ISHIDA, Mitsunaga KINJO, Shigeo SATO, Koji NAKAJIMA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) To realize high information processing ability of neural networks, implementing an integrated hardware with high speed is essential. To meet these requirements, we adopt two methods. One is weight quantization and another is introduction of nonmonotonic neurons. We consider a network with 3-value {-1,0,+1} weights, which has high capability of integration, but degrade the learning performance. To compensate the degradation, nonmonotonic neurons, which exhibit high learning ability, are introduced. However, the learning performance depends on a threshold which is one of the nonmonotonic neuron's parameter, and the optimum one depends on such as problems and network structures. Therefore, we propose a threshold learning algorithm and confirm the usefulness of the learning algorithm by numerical simulations. Moreover, we have implemented such quantized connection nonmonotonic neural networks with 20 neurons and 400 synapses including the learning module using analog circuits.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Neural Network / Quantized Connection / Nonmonotonic Neuron / Threshold Learning Algorithm / Hardware Implementation
Paper # NC2002-77
Date of Issue

Conference Information
Committee NC
Conference Date 2002/11/4(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Neurocomputing (NC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Hardware Implementation of Quantized Connection Nonmonotoinc Neural Networks and a Threshold Learning Algorithm
Sub Title (in English)
Keyword(1) Neural Network
Keyword(2) Quantized Connection
Keyword(3) Nonmonotonic Neuron
Keyword(4) Threshold Learning Algorithm
Keyword(5) Hardware Implementation
1st Author's Name Takuya HAGA
1st Author's Affiliation Research Institute of Electrical Communication, Tohoku University()
2nd Author's Name Fumihiko ISHIDA
2nd Author's Affiliation Graduate School of Information Systems, University of Electro-Communications
3rd Author's Name Mitsunaga KINJO
3rd Author's Affiliation Research Institute of Electrical Communication, Tohoku University
4th Author's Name Shigeo SATO
4th Author's Affiliation Research Institute of Electrical Communication, Tohoku University
5th Author's Name Koji NAKAJIMA
5th Author's Affiliation Research Institute of Electrical Communication, Tohoku University
Date 2002/11/4
Paper # NC2002-77
Volume (vol) vol.102
Number (no) 430
Page pp.pp.-
#Pages 6
Date of Issue