Presentation 2004/1/7
Chip-level Maximum Likelihood Detection for DS-CDMA in a Frequency-Selective Fading Channel
Akihiro Saito, Shinsuke Takaoka, Fumiyuki Adachi,
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Abstract(in English) In the direct sequence code division multiple access (DS-CDMA), variable transmission rate can be realized by changing the spreading factor (SF) for the given chip rate. In a frequency-selective fading channel, the transmission performance can be improved by using rake combining. However, if too small SF is used for achieving a high transmission rate, an error floor occurs due to inter-path interference (IPI). In this paper, a chip-level maximum likelihood detection (chip-level MLD) is proposed that can suppress the IPI. The conditional theoretical upper-bound of bit error rate (BER) of the chip-level MLD is derived. The upper-bound average BER in a frequency-selective Rayleigh fading channel is numerically obtained using the derived conditional upper-bound BER by Monte Carlo simulation method and compared with theoretical average BER performance of Rake combining. Also, the average BER performance of chip-level MLD is obtained by computer simulation of DS-CDMA signal transmission and compared with the theoretically obtained upper-bound BER.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) DS-CDMA / maximum likelihood detection / rake combining
Paper # DSP2003-142,SAT2003-139,RCS2003-237
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Committee RCS
Conference Date 2004/1/7(1days)
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Registration To Radio Communication Systems (RCS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Chip-level Maximum Likelihood Detection for DS-CDMA in a Frequency-Selective Fading Channel
Sub Title (in English)
Keyword(1) DS-CDMA
Keyword(2) maximum likelihood detection
Keyword(3) rake combining
1st Author's Name Akihiro Saito
1st Author's Affiliation Dept. of Electrical and Communication Engineering, Graduate School of Engineering, Tohoku University()
2nd Author's Name Shinsuke Takaoka
2nd Author's Affiliation Dept. of Electrical and Communication Engineering, Graduate School of Engineering, Tohoku University
3rd Author's Name Fumiyuki Adachi
3rd Author's Affiliation Dept. of Electrical and Communication Engineering, Graduate School of Engineering, Tohoku University
Date 2004/1/7
Paper # DSP2003-142,SAT2003-139,RCS2003-237
Volume (vol) vol.103
Number (no) 551
Page pp.pp.-
#Pages 5
Date of Issue