| Presentation | 2003/11/13 A Slotted Post-wall Waveguide Array with Inter-digital Structure for 45-deg Linear and Dual Polarization Yusuke OKAJIMA, Se-Hyun PARK, Jiro HIROKAWA, Makoto ANDO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have proposed a dual-polarized planar antenna where two slotted waveguide arrays to radiate orthogonal 45-deg linearly-polarized waves are installed on a substrate using post-wall inter-digital structure. We have confirmed uniform excitation of the two dimentional slot array at 25GHz band. We have investigated the isolation between orthogonal polarized slot arrays of inter-digital stracture in terms of slot spacing along the waveguide axis. The isolation is 33.0dB when the relative shift of slot position between the two arrays is -0.5λg., while it is 12.8dB for no shift. The cross polarization level of far field is -25.2dB for -0.5λg shift, which is almost equal to that for the isolated array. It is -9.6dB for no shift. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | dual polarized antenna / planar antenna / slot antenna / inter-digital structure |
| Paper # | A・P2003-149,RCS2003-155 |
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| Conference Information | |
| Committee | RCS |
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| Conference Date | 2003/11/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Radio Communication Systems (RCS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Slotted Post-wall Waveguide Array with Inter-digital Structure for 45-deg Linear and Dual Polarization |
| Sub Title (in English) | |
| Keyword(1) | dual polarized antenna |
| Keyword(2) | planar antenna |
| Keyword(3) | slot antenna |
| Keyword(4) | inter-digital structure |
| 1st Author's Name | Yusuke OKAJIMA |
| 1st Author's Affiliation | Dept. Electrical and Electronic Engineering Tokyo Institute of Technology() |
| 2nd Author's Name | Se-Hyun PARK |
| 2nd Author's Affiliation | Dept. Electrical and Electronic Engineering Tokyo Institute of Technology |
| 3rd Author's Name | Jiro HIROKAWA |
| 3rd Author's Affiliation | Dept. Electrical and Electronic Engineering Tokyo Institute of Technology |
| 4th Author's Name | Makoto ANDO |
| 4th Author's Affiliation | Dept. Electrical and Electronic Engineering Tokyo Institute of Technology |
| Date | 2003/11/13 |
| Paper # | A・P2003-149,RCS2003-155 |
| Volume (vol) | vol.103 |
| Number (no) | 459 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |