Presentation 2004-07-20
A Hardware Organization of High-Radix Modular Multiplication for RSA Cryptosystem
Yi GE, Takao SAKURAI, Koki ABE, Shuichi SAKAI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Hardware organized modular multiplication based on division algorithm is one of the effective methods used for RSA encryption/decryption. This paper generalizes the hardware organization of the modular multiplication based on the higher-radix SRT division algorithm, and describes the area/time trade-off of the organization. For the number representation we used the signed-digit number system and for selecting the multiple of modular we employed the arithmetic operation instead of the conventional look-up table. The method based on the arithmetic operation is suitable for keeping the same structure over wide range of high radices. The result of the evaluation revealed that a radix-16 multiplier produced 1.5 times speedup at about 1.6 times area cost compared with radix-4 multiplier.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) RSA cryptosystem / modular multiplication / SRT division / high-radix / signed-digit number
Paper # ISEC2004-15
Date of Issue

Conference Information
Committee ISEC
Conference Date 2004/7/13(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Information Security (ISEC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Hardware Organization of High-Radix Modular Multiplication for RSA Cryptosystem
Sub Title (in English)
Keyword(1) RSA cryptosystem
Keyword(2) modular multiplication
Keyword(3) SRT division
Keyword(4) high-radix
Keyword(5) signed-digit number
1st Author's Name Yi GE
1st Author's Affiliation Department of Information and Communication Engineering, Graduate School of Information Science and Technology, The University of Tokyo()
2nd Author's Name Takao SAKURAI
2nd Author's Affiliation Department of Information and Communication Engineering, Graduate School of Information Science and Technology, The University of Tokyo
3rd Author's Name Koki ABE
3rd Author's Affiliation Department of Computer Science. The University of Electro-Communications
4th Author's Name Shuichi SAKAI
4th Author's Affiliation Department of Information and Communication Engineering, Graduate School of Information Science and Technology, The University of Tokyo
Date 2004-07-20
Paper # ISEC2004-15
Volume (vol) vol.104
Number (no) 199
Page pp.pp.-
#Pages 6
Date of Issue