| Presentation | 2003/1/28 An Asynchronous Pulse Neuron Integrated Circuit Takuya TANIGUCHI, Yoshihiko HORIO, Kazuyuki AIHARA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An asynchronous pulse neural network model has been proposed. The model uses a dynamical spacio-temporal pattern in a network to process information. In such a network, precise timing of each action potential is important. Therefore, an analog circuit implementation of the model is desired because the analog circuit can handle continuous time and values. In this paper, we integrate a neuron circuit for the asynchronous pulse neural network model. The model parameters of the IC chip can be altered externally, so that the neuron circuit works as either an integrator or a coincidence detector, or in between. Experimental measurements confirm that the integrated neuron circuit qualitatively replicates the behavior of the asynchronous pulse neuron model. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Pulse Neural Network / Analog Integrated Circuit / Asynchronous system |
| Paper # | NLP2002-112 |
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| Conference Information | |
| Committee | NLP |
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| Conference Date | 2003/1/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Nonlinear Problems (NLP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Asynchronous Pulse Neuron Integrated Circuit |
| Sub Title (in English) | |
| Keyword(1) | Pulse Neural Network |
| Keyword(2) | Analog Integrated Circuit |
| Keyword(3) | Asynchronous system |
| 1st Author's Name | Takuya TANIGUCHI |
| 1st Author's Affiliation | Dept. of Electronic Engineering, Tokyo Denki University Graduate School() |
| 2nd Author's Name | Yoshihiko HORIO |
| 2nd Author's Affiliation | Dept. of Electronic Engineering, Tokyo Denki University Graduate School |
| 3rd Author's Name | Kazuyuki AIHARA |
| 3rd Author's Affiliation | Dept. of Mathematical Engineering, The University of Tokyo:JST |
| Date | 2003/1/28 |
| Paper # | NLP2002-112 |
| Volume (vol) | vol.102 |
| Number (no) | 626 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |