| Presentation | 2003/10/17 A Hardware/Software Cosynthesis Method for CAM Processor with Area Constraints Yuichiro ISHIKAWA, Yuichiro MIYAOKA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have been building the hardware/software cosynthesis system for a processor core with a content addressable memory (CAM) . We input a description of an application program written in C language into the system, and the system outputs an optimal hardware configration of a CAM processor which executes an inputted application program. This paper extends our hardware/software cosynthesis system which incorporates area constraints for a CAM processor. The system computes the number of CAM words which minimizes the execution time with meeting the area constraints. We reduce the CAM processor's area by replacing CAM with RAM according to the word number that the system computed. Experimental results for practical application program show that the system can output a configration of the processor which executes the application program fastest with meeting the area constraints. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Content Addressable Memory / equivalent search / area constraint / HW/SW cosynthesis |
| Paper # | DSP2003-138,ICD2003-136,IE2003-98 |
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| Conference Information | |
| Committee | DSP |
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| Conference Date | 2003/10/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Digital Signal Processing (DSP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Hardware/Software Cosynthesis Method for CAM Processor with Area Constraints |
| Sub Title (in English) | |
| Keyword(1) | Content Addressable Memory |
| Keyword(2) | equivalent search |
| Keyword(3) | area constraint |
| Keyword(4) | HW/SW cosynthesis |
| 1st Author's Name | Yuichiro ISHIKAWA |
| 1st Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University() |
| 2nd Author's Name | Yuichiro MIYAOKA |
| 2nd Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University |
| 3rd Author's Name | Nozomu TOGAWA |
| 3rd Author's Affiliation | Dept. of Information and Media Sciences, The University of Kitakyushu:Advanced Research Institute for Science and Engineering, Waseda University |
| 4th Author's Name | Masao YANAGISAWA |
| 4th Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University |
| 5th Author's Name | Tatsuo OHTSUKI |
| 5th Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University |
| Date | 2003/10/17 |
| Paper # | DSP2003-138,ICD2003-136,IE2003-98 |
| Volume (vol) | vol.103 |
| Number (no) | 380 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |