| Presentation | 2003/6/20 A Technique of Optimization With Reductioning of Redudancy in DSP Programs Takefumi MIYOSHI, Nobuhiko SUGINO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | For efficiently implementation of a signal processing algorithm on a given processor architecture, we often need to choose an appropriate algorithm among existing ones, or design an algorithm effective for the target architecture, where elapsed time and usage of computational resources are taken into account. In this article, a given program is analysed by use of the 3-D representation scheme, and then it is automatically translated into one of the most efficient algorithms for a target hardware. The 3-D representation scheme is extended, so that it can easily handle multiple data stream with nested conditional branches. Heuristic transformation techniques over the 3-D representation are proposed. The proposed techniques are iteratively applied to an example sorting algorithm, and, bv the derived algorithm, its effectiveness is shown. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 3D-Graph / DSP-Program / Algorithm-translation |
| Paper # | DSP2003-57 |
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| Conference Information | |
| Committee | DSP |
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| Conference Date | 2003/6/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Digital Signal Processing (DSP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Technique of Optimization With Reductioning of Redudancy in DSP Programs |
| Sub Title (in English) | |
| Keyword(1) | 3D-Graph |
| Keyword(2) | DSP-Program |
| Keyword(3) | Algorithm-translation |
| 1st Author's Name | Takefumi MIYOSHI |
| 1st Author's Affiliation | Department of Advanced Applied Electronics, Tokyo Institute of Techology() |
| 2nd Author's Name | Nobuhiko SUGINO |
| 2nd Author's Affiliation | Department of Advanced Applied Electronics, Tokyo Institute of Techology |
| Date | 2003/6/20 |
| Paper # | DSP2003-57 |
| Volume (vol) | vol.103 |
| Number (no) | 147 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |