| Presentation | 2004/3/5 A Virtual IP Analogizing Algorithm in HW/SW Partitioning System Yuichi ODA, Jumpei UCHIDA, Yuichiro MIYAOKA, Nozomu TOGAWA, Masayoshi TACHIBANA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we propose a virtual IP analogizing algorithm. This algorithm enumerates virtual IPs on the analogy of existing IPs based on "the parallelism" and "the iterative process". We focus on image processing applications, such as MPEG-4, JPEG, and JPEG2000. We analyze the processes (DOT, quantization, etc.) which constitute these applications. Then we apply "an algorithm based on the parallelism" or "an algorithm based on the iterative process" to each processes. By applying the proposed algorithm, design space spreds. We implement the proposed algorithm on a computer and show its effectiveness. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | HW/SW codesign / HW/SW partitioning / Qualitative measures / IP reuse / IP analogizer |
| Paper # | VLD2003-158 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2004/3/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Virtual IP Analogizing Algorithm in HW/SW Partitioning System |
| Sub Title (in English) | |
| Keyword(1) | HW/SW codesign |
| Keyword(2) | HW/SW partitioning |
| Keyword(3) | Qualitative measures |
| Keyword(4) | IP reuse |
| Keyword(5) | IP analogizer |
| 1st Author's Name | Yuichi ODA |
| 1st Author's Affiliation | Dept. of Electronics, Infomation and Communication Engineering, Waseda University() |
| 2nd Author's Name | Jumpei UCHIDA |
| 2nd Author's Affiliation | Dept. of Computer Science, Waseda University |
| 3rd Author's Name | Yuichiro MIYAOKA |
| 3rd Author's Affiliation | Dept. of Electronics, Infomation and Communication Engineering, Waseda University |
| 4th Author's Name | Nozomu TOGAWA |
| 4th Author's Affiliation | Dept. of Information and Media Sciences, The University of Kitakyushu:Advanced Research Institute for Science and Engineering, Waseda University |
| 5th Author's Name | Masayoshi TACHIBANA |
| 5th Author's Affiliation | Dept. of Electronic and Photonic System Engineering, Kouchi University of Technology |
| 6th Author's Name | Masao YANAGISAWA |
| 6th Author's Affiliation | Dept. of Computer Science, Waseda University |
| 7th Author's Name | Tatsuo OHTSUKI |
| 7th Author's Affiliation | Dept. of Computer Science, Waseda University |
| Date | 2004/3/5 |
| Paper # | VLD2003-158 |
| Volume (vol) | vol.103 |
| Number (no) | 703 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |