| Presentation | 2003/5/8 システムLSI用CPUコアの設計(システム設計及び一般) Kazuki Maeda, Hiroaki Kashiwai, Masafomi Asami, Shuhei Onda, Shigeo Kuninobu, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have proposed a topdown design from RTL to layout using Verilog HDL. Target is a 32-bit RISC processor. The processor is a core of system LSI and a model for education. The design covers (1) HDL description of data path and control unit, (2) Test bench description, (3) Simulation (4) Logic synthesis, and (5) Place and route for FPGA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | HDL / Topdown Design / Microprocessor Core / System LSI / FPGA |
| Paper # | VLD2003-4 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2003/5/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | |
| Sub Title (in English) | |
| Keyword(1) | HDL |
| Keyword(2) | Topdown Design |
| Keyword(3) | Microprocessor Core |
| Keyword(4) | System LSI |
| Keyword(5) | FPGA |
| 1st Author's Name | Kazuki Maeda |
| 1st Author's Affiliation | Faculty of Science, Kochi University() |
| 2nd Author's Name | Hiroaki Kashiwai |
| 2nd Author's Affiliation | Faculty of Science, Kochi University |
| 3rd Author's Name | Masafomi Asami |
| 3rd Author's Affiliation | Faculty of Science, Kochi University |
| 4th Author's Name | Shuhei Onda |
| 4th Author's Affiliation | Faculty of Science, Kochi University / |
| 5th Author's Name | Shigeo Kuninobu |
| 5th Author's Affiliation | |
| Date | 2003/5/8 |
| Paper # | VLD2003-4 |
| Volume (vol) | vol.103 |
| Number (no) | 40 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |