Presentation 2003/1/21
Design and evaluation of secure network board SEBSW-2
Hirotsugu KAJISAKI, Takakazu KUROKAWA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Recently, secret-key block cipher is applied to many systems in order to encrypt/decrypt massive data. lt isn't secure to use the same cipher in a system continuously because of the improvement of computational power as well as the advancement of cipher attack technologies. Consequently, out research goal aims at an establishment of the communication system with changing not only keys but also cryptographic algorithms dynamically. By the present, an evaluation environment is under establishment and a secure PC board to encrypt data using an FPGA has been already developed. In this paper, the design of a secure PC board named as "SEBSW-2" using XCV300 is presented. And its basic performance evaluation is shown. Performance evaluation results of SEBSW-2 with DES or Triple-DES on an XCV300 will be also shown.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) secret-key block cipher / FPGA / secure PC board
Paper # VLD2002-123,CPSY2002-76
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Conference Information
Committee VLD
Conference Date 2003/1/21(1days)
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Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design and evaluation of secure network board SEBSW-2
Sub Title (in English)
Keyword(1) secret-key block cipher
Keyword(2) FPGA
Keyword(3) secure PC board
1st Author's Name Hirotsugu KAJISAKI
1st Author's Affiliation Department of Computer Science, National Defence Academy()
2nd Author's Name Takakazu KUROKAWA
2nd Author's Affiliation Department of Computer Science, National Defence Academy
Date 2003/1/21
Paper # VLD2002-123,CPSY2002-76
Volume (vol) vol.102
Number (no) 608
Page pp.pp.-
#Pages 6
Date of Issue