| Presentation | 2002/11/21 Development of IP Library of IEEE754 Std Single-Precision Floating-Point Dividers Hiroyuki OCHI, Tatsuya SUZUKI, Sayaka MATSUNAGA, Yoichi KAWANO, Takao TSUDA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Floating-point units (FPUs) are indispensable in processors, 3D-graphic engines, etc. To improve design productivity of these LSIs, FPU IPs are strongly desired. However, it is impossible to cover wide range of needs by an FPU IP, because there are various kind of options in specifications (e.g., operating frequency, latency, and ability of pipeline operation) and implementations (e.g., hardware algorithms). In this report, we have developed a library which consists of 20 IPs for IEEE754 Std single-precision floating-point division with various kind of specifications and implementations. A catalogue for the IP Library is also developed, which shows post-layout area and power dissipation as well as specification of each IP. It is usable not only for selection of optimal IP for specific application, but also for quantitative analysis at the early stage of architecture design. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Intellectual Property (IP) / Arithmetic Unit / SRT Method / Restoring Method / Frequency / Area / Power |
| Paper # | VLD2002-116 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2002/11/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of IP Library of IEEE754 Std Single-Precision Floating-Point Dividers |
| Sub Title (in English) | |
| Keyword(1) | Intellectual Property (IP) |
| Keyword(2) | Arithmetic Unit |
| Keyword(3) | SRT Method |
| Keyword(4) | Restoring Method |
| Keyword(5) | Frequency |
| Keyword(6) | Area |
| Keyword(7) | Power |
| 1st Author's Name | Hiroyuki OCHI |
| 1st Author's Affiliation | Faculty of Information Sciences, Hiroshima City University() |
| 2nd Author's Name | Tatsuya SUZUKI |
| 2nd Author's Affiliation | Faculty of Information Sciences, Hiroshima City University |
| 3rd Author's Name | Sayaka MATSUNAGA |
| 3rd Author's Affiliation | Faculty of Information Sciences, Hiroshima City University |
| 4th Author's Name | Yoichi KAWANO |
| 4th Author's Affiliation | Faculty of Information Sciences, Hiroshima City University |
| 5th Author's Name | Takao TSUDA |
| 5th Author's Affiliation | Faculty of Information Sciences, Hiroshima City University |
| Date | 2002/11/21 |
| Paper # | VLD2002-116 |
| Volume (vol) | vol.102 |
| Number (no) | 476 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |